1. Field of the Invention
The invention relates to an active-matrix display device.
2. Description of the Related Art
In an active-matrix display device such as a liquid crystal display device, an image is displayed by arranging display pixels in positions corresponding to intersections between a plurality of scanning lines arranged in a row direction of a display portion and a plurality of signal lines arranged in a column direction of the display portion and applying preset voltages to the display pixels. In the conventional display device, it is required to provide signal lines and scanning lines for the respective display pixels. Therefore, outputs of a signal-line drive device (source driver) that drives the signal lines corresponding in number to the number of signal lines are required and outputs of a scanning-line drive device (gate driver) that drives the scanning lines corresponding in number to the number of scanning lines are required.
As one of the proposals for reducing the number of signal lines, for example, the technique is disclosed in Jpn. Pat. Appln. KOKAI Publication No. 2010-19914. In Jpn. Pat. Appln. KOKAI Publication No. 2010-19914, a display pixel connected to a signal line via a thin-film transistor (TFT) is connected to a display pixel via a different TFT and each of the two TFTs is driven by means of a different scanning line. In Jpn. Pat. Appln. KOKAI Publication No. 2010-19914, the number of signal lines can be reduced to two thirds by utilizing the above configuration.
In Jpn. Pat. Appln. KOKAI Publication No. 2010-19914, a display pixel connected to a signal line via two TFTs and one display pixel is present. Parasitic capacitance is associated with the TFT and the display pixel is equivalently a capacitive load. Therefore, the display pixel connected to the signal line via the two TFTs and one display pixel has a larger capacitive load with respect to the signal line in comparison with a display pixel connected to a signal line via only one TFT. Therefore, the time constant of the display pixel connected to the signal line via the two TFTs and one display pixel tends to become larger in comparison with the display pixel connected to the signal line via only one TFT. As a result, it tends to take a longer time to write a display signal of a desired voltage level in the display pixel connected to the signal line via the two TFTs and one display pixel in comparison with the display pixel connected to the signal line via only one TFT.